Voltage Scalable High Speed Arithmetic and Logic Unit Architecture for Processor Design

Kiruthiga S¹, P Gomathi²

¹Assistant Professor, ²Professor, Department of ECE, NSN College of Engineering and Technology, India

Abstract

Using the reconfigurable logic of scalable voltage MOSFETs, a 4-bit ALU has been designed for various operations. The ALU can perform arithmetic and logical operations. Scalable voltage transistors have been promising in realizing increased functionality on a chip. A scalable voltage MOS transistor accepts multiple inputs signals, calculates the weighted sum of all input signals and then controls the ON and OFF states of the transistor. This enhances the transistor function to more than just switching. This changes the way a logic function can be realized. Implementing a design using scalable voltage MOSFETs brings about reduction in transistor threshold voltage and power consumption. The advantage of bringing down the number of devices is that a design becomes area efficient and power consumption reduces. The arithmetic logic unit (ALU) is the core of a CPU in a computer. The adder cell is the elementary unit of an ALU. The constraints the adder has to satisfy are area, power and speed requirements. We proposed a low power 1-bit full adder (FA) with 10-transistors and this is used in the design ALU. By using low power 1-bit full adder in the implementation of ALU, the power and area are greatly reduced when compared to conventional design.

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Cite this Article as Follows

Kiruthiga S, P Gomathi. "Voltage Scalable High Speed Arithmetic and Logic Unit Architecture for Processor Design." International Conference on Intelligent Computing and Systems (2017): 32. Print.