ICSSCCET 2015

International Conference on Systems, Science, Control, Communication, Engineering and Technology 2015

 


ICSSCCET 2015 Kokula Krishna Hari K
Publication Meta Value
Short Title ICSSCCET 2015
Publisher ASDF, India
ISBN 13 978-81-929866-1-6
ISBN 10 81-929866-1-6
Language English
Type Hard Bound - Printed Book
Copyrights ICSSCCET Organizers / DCRC, London, UK
Editor-in-Chief Ramachandran T
Conference Dates 10 - 11, August 2015
Venue Country Karpagam Institute of Technology, Coimbatore, India
Submitted Papers 410
Acceptance Rate 4.11%
Website www.icssccet.org

Paper 029


An effective clock generator for Heterogeneous GALS in CMOS technology

An effective clock generator for Heterogeneous GALS in CMOS technology

A G Paranthaman1, S Anbarasu2, R Neethu3

1, 2, 3 Assistant Professor, Department of ECE.
Karpagam Institute of Technology, Coimbatore.

Abstract

It is so complicate to present clock generator for GALS (Globally Asynchronous Locally Synchronous) MPSoCs (Multiprocessor Systems-on-chip) and here we are going to produce ADPLL (All-Digital Phase-Locked Loop) clock generator that consumes very low power of 2.7 mW and it has very small chip area of 0.0078 mm. These ADPLL clock generators are used in fine-grained power management such as DVFS per core and it contains phase rotation and frequency division blocks which are used to generate multiphase clock signal since that frequencies of core varies from 83 to 666 MHz with 50% duty cycle. Such clock should encounter the stipulation of DDR2/DDR3 memory interfaces and in addition it renders a devoted eminent-speed clock up to 4 GHz for serial data links of network-on-chip. And, in fast dynamic frequency scaling applications the core frequencies varies randomly in one clock cycle. Finally, a prototype in 65-nm CMOS technology varies the performance of statistical analysis of mismatch.

Author's Profile

A G Paranthaman : Profile

S Anbarasu : Profile

R Neethu : Profile

Cite this Article as Follows

A G Paranthaman, S Anbarasu, R Neethu."An effective clock generator for Heterogeneous GALS in CMOS technology." International Conference on Systems, Science, Control, Communication, Engineering and Technology (2015): 140-143. Print.